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[VHDL-FPGA-Verilog] fifo程序

Description: 用verilog语言在fpga中实现fifo功能！-using Verilog language in which they simply realize fifo function!
Platform: | Size: 1024 | Author: 刘涛 | Hits:

[VHDL-FPGA-Verilog] FIFO_BEFORE

Description: 是基于fpga的FIFO乒乓操作，后面是与SDRAM接口的，这样主要方便sdram的刷新-fpga is based on the FIFO Table Tennis operation, and is behind SDRAM interface, This major update to the convenience sdram
Platform: | Size: 211968 | Author: eva | Hits:

[VHDL-FPGA-Verilog] my_fifo_vhdl

Description: XILINX的FPGA实现的双口ram源码，可作为dsp\SDRAM和pci桥接作用，可直接使用，实际工程通过。-XILINX FPGA Implementation of the dual-port ram source, as dsp \ SDRAM and pci bridge, and can be used directly, through practical projects.
Platform: | Size: 19456 | Author: 朱效志 | Hits:

[VHDL-FPGA-Verilog] fifo

Description: 使用Verilog语言编写，把FPGA配置成一个fifo-The use of Verilog language, the FPGA configuration into a fifo
Platform: | Size: 19456 | Author: achesser | Hits:

[Software Engineering] fifo_generator_ug175

Description: 该文档是有关利用XINLIX的FPGA如何实现FIFO的生成及如何应用的文章。-The document is related to the FPGA using XINLIX how to achieve FIFO generation and how to use the article.
Platform: | Size: 714752 | Author: cobain | Hits:

[VHDL-FPGA-Verilog] vr_fifo

Description: 可预取的fifo 的fpga 设计代码，满足异步时钟的操作-Can prefetch the fifo of the FPGA design code, to meet the asynchronous clock operation
Platform: | Size: 573440 | Author: yy | Hits:

[VHDL-FPGA-Verilog] 16550

Description: UART16550兼容的串行通讯控制器，Verilog语言描述，采用Altera Cyclone系列芯片实现FPGA综合，因为FIFO部分利用到内部资源实现。已经在某项目中成功应用，特此推出。-UART16550 compatible serial communication controller, Verilog language description, the use of Altera Cyclone series FPGA chip integrated, as part of the use of FIFO to the internal resources to achieve. Projects have been in a successful application, is hereby introduced.
Platform: | Size: 10240 | Author: David.Mr.Liu | Hits:

[VHDL-FPGA-Verilog] fifo-1117

Description: 这是异步FIFO的VHDL实现代码，已经在FPGA上通过实践证明，运行状态良好-This is the asynchronous FIFO realize the VHDL code, the FPGA has been proved through practice, running in good condition
Platform: | Size: 20480 | Author: 杨宇 | Hits:

[VHDL-FPGA-Verilog] UART

Description: 使用FPGA的FIFO，状态机，乒乓操作等实现了异步UART。-The use of FPGA-FIFO, state machine, ping-pong operation to achieve the asynchronous UART.
Platform: | Size: 1106944 | Author: xiao cao | Hits:

[VHDL-FPGA-Verilog] Fifo

Description: 一个FIFO源代码，基于Altera FPGA-A FIFO source code, based on Altera FPGA
Platform: | Size: 1024 | Author: jiashengwen | Hits:

[VHDL-FPGA-Verilog] fpga.fifo

Description: 异步FIFO是用来适配不同时钟域之间的相位差和频率飘移的重要模块。本文设计的异步FIFO采用了格雷（GRAY）变换技术和双端口RAM实现了不同时钟域之间的数据无损传输。该结构利用了GRAY变换的特点，使得整个系统可靠性高和抗干扰能力强，系统可以工作在读写时钟频率漂移达到正负300PPM的恶劣环境。并且由于采用了模块化结构，使得系统具有良好的可扩充性。-Asynchronous FIFO is an important module which always used to absorb the phase and frequency offset between different clock domain in communication area .In this paper, an FIFO module is designed using Gray convert technology and dual-port ram , which realizing scatheless transmit between different clock domain. The advances of Gray (Only one bit changes between neighboring two clock ) improves the reliability and anti-jamming capability of the system. And the system can work normally in the bad condition which the phase and frequency offset target to 300PPM. It is proved by work that the FIFO module can fulfill the demands of real-time of data transmitting system, and the module is powerful enough for more data process in the future.
Platform: | Size: 81920 | Author: 雷志 | Hits:

[VHDL-FPGA-Verilog] fifo

Description: FIFO程序，适用FPGA仿真的代码，有一定的价值-FIFO
Platform: | Size: 3072 | Author: 陈一可 | Hits:

[VHDL-FPGA-Verilog] fifo

Description: 同步FIFO 创建一个256x8大小的同步FIFO，并通过串口发送数据初始化FIFO，FPGA内部读取FIFO的数据通过窗口发送到PC-FIFO
Platform: | Size: 4096 | Author: 赵云 | Hits:

[VHDL-FPGA-Verilog] FIFO

Description: FPGA实现FIFO模块，用于异步数据处理，作为高速缓冲CACHE-FPGA realization of FIFO module for asynchronous data processing, as the cache CACHE
Platform: | Size: 348160 | Author: 王军 | Hits:

[VHDL-FPGA-Verilog] FIFO

Description: FIFO control in the FPGA-FIFO control in the FPGA
Platform: | Size: 671744 | Author: 孙林 | Hits:

[VHDL-FPGA-Verilog] fifo

Description: fpga中fifo的基本原理介绍了fifo的基本原理以及对fifo实现方法的阐述。-The basic principle in fpga fifo fifo introduced the basic principles and methods of implementation described fifo.
Platform: | Size: 527360 | Author: 何敬武 | Hits:

[VHDL-FPGA-Verilog] actel_fpga_FIFO

Description: actel FPGA的fifo使用说明，你也可以在周立功官网上下载的到，比较实用！-actel FPGA fifo instructions, you can also download form the www.zlgmcu.com !
Platform: | Size: 1136640 | Author: 书荣 | Hits:

[VHDL-FPGA-Verilog] FPGA-FIFO

Description: FPGA FIFO方面的相关文档，对于刚接触FPGA FIFO的同学有所帮助-The FPGA FIFO related documentation, help students new to FPGA FIFO
Platform: | Size: 2236416 | Author: lw | Hits:

[Other] FIFO

Description: STM32通过与FPGA通信读取FPGA的串行FIFO(STM32 and FPGA FIFO communication)
Platform: | Size: 9152512 | Author: k77 | Hits:

[Other] DSP读写基于FPGA的FIFO

Description: 本文档提供了DSP对FPGA中的FIFO的读写时序以及编程思路，供大家参考。(This document provides DSP on the FPGA FIFO read and write timing and programming ideas for your reference.)
Platform: | Size: 987136 | Author: wangxiaobei | Hits:
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